Hmm..I come up with a different value for the thresholds.
The PT6520 display controller chip spec states that the minimum logic high input at Vss=-5vdc, Vdd=0vdc is Vss+2.
Putting this in more conventional terms, the conditions are Vss=0vdc and Vdd=+5vdc. High Threshold = Vss+2 = 0+2 = 2vdc.
So the minimum high input threshold with a 5 vdc supply is 2 volts.
Output high voltage is specified at Vss+2.4 at 3 mA. Vss+2.4 = 0+2.4 = 2.4vdc
Best,
Don
But which threshold to use: CMOS or TTL (VIHC or VIHT)?
The display chip lists both and I am not sure which to use. Your numbers are for the VIHT case, correct? For the VIHC case, it is VSS x 0.2 for the threshold. That is 1V less than the "0V", which is 5V in reality. That would be 4V. (that is one crazy datasheet). The part says that it is "CMOS", but why publish TTL unless it is for interfacing to TTL? The STM32 is CMOS.
If this is true, then 4V would be the "worst case" guaranteed number. The switching would occur at lower levels, obviously overlapping into the 3.3V OL level. Otherwise none of them would work.
If the "4V" case is the right one, then variations in the USB wall wart voltages might explain why some units have no problem (lower USB voltages, like 4.8V or something) and others have problems (the higher voltage case). Tobi himself said that he saw corrupted displays at high voltage. This possibly would move the VIH threshold up.
I need to ponder this some more
Greg H.